#include <stdint.h>
Go to the source code of this file.
|
| #define | psi_00 |
| #define | psi_01 |
| #define | psi_02 |
| #define | psi_10 |
| #define | psi_11 |
| #define | psi_12 |
| #define | psi_20 |
| #define | psi_21 |
| #define | psi_22 |
| #define | psi_30 |
| #define | psi_31 |
| #define | psi_32 |
| #define | Chi_00 |
| #define | Chi_01 |
| #define | Chi_02 |
| #define | Chi_10 |
| #define | Chi_11 |
| #define | Chi_12 |
| #define | UChi_00 |
| #define | UChi_01 |
| #define | UChi_02 |
| #define | UChi_10 |
| #define | UChi_11 |
| #define | UChi_12 |
| #define | U0 |
| #define | U1 |
| #define | U2 |
| #define | one |
| #define | perm_reg |
| #define | REP |
| #define | IMM |
| #define | pREP |
| #define | pIMM |
| #define | PPC_INST_DCBTLS |
| #define | PPC_INST_DCBLC |
| #define | __PPC_CT(t) |
| #define | ___PPC_RA(a) |
| #define | ___PPC_RB(b) |
| #define | LOCK_SET |
| #define | LOCK_CLEAR |
| #define | Chi_20 |
| #define | Chi_21 |
| #define | Chi_22 |
| #define | Chi_30 |
| #define | Chi_31 |
| #define | Chi_32 |
| #define | HASHit(A) |
| #define | HASH(A) |
| #define | LOAD64(A, ptr) |
| #define | MASK_REGS |
| #define | PF_GAUGE(A) |
| #define | PREFETCH1_CHIMU(base) |
| #define | PREFETCH_CHIMU(base) |
| #define | VLOADf(OFF, PTR, DEST) |
| #define | VLOADuf(OFF, PTR, DEST) |
| #define | VSTOREf(OFF, PTR, SRC) |
| #define | VSTOREuf(OFF, PTR, SRC) |
| #define | VSPLATf(A, B, DEST) |
| #define | VSIZEf |
| #define | VPERMIi(p) |
| #define | VPERMi(A, p) |
| #define | VPERMI(p) |
| #define | VPERM(A, p) |
| #define | VLOADd(OFF, PTR, DEST) |
| #define | VLOADud(OFF, PTR, DEST) |
| #define | VSTOREd(OFF, PTR, SRC) |
| #define | VSTOREud(OFF, PTR, SRC) |
| #define | VSPLATd(A, B, DEST) |
| #define | VSIZEd |
| #define | VZEROi(DEST) |
| #define | VONEi(DEST) |
| #define | VMOVi(DEST, A) |
| #define | VADDi(DEST, A, B) |
| #define | VSUBi(DEST, A, B) |
| #define | VMULi(DEST, A, B) |
| #define | VMUL_RR_RIi(DEST, A, B) |
| #define | VMADDi(DEST, A, B, C) |
| #define | VMADD_RR_RIi(DEST, A, B, C) |
| #define | VMADD_MII_IRi(DEST, A, B, C) |
| #define | VMADD_II_MIRi(DEST, A, B, C) |
| #define | VZERO(C) |
| #define | VONE(C) |
| #define | VMOV(C, A) |
| #define | VADD(A, B, C) |
| #define | VSUB(A, B, C) |
| #define | VMUL(A, B, C) |
| #define | VMUL_RR_RI(A, B, C) |
| #define | VMADD(A, B, C, D) |
| #define | VMADD_RR_RI(A, B, C, D) |
| #define | VMADD_MII_IR(A, B, C, D) |
| #define | VMADD_II_MIR(A, B, C, D) |
| #define | LOCK_GAUGE(dir) |
| #define | UNLOCK_GAUGE(dir) |
| #define | ZERO_PSI |
| #define | MULT_2SPIN_QPX_LSd(ptr, p) |
| #define | MULT_2SPIN_QPX_LSf(ptr, p) |
| #define | MULT_2SPIN_QPXd(ptr, p) |
| #define | MULT_2SPIN_QPXf(ptr, p) |
| #define | MULT_2SPIN_QPX_INTERNAL(ptr, p, ULOAD, USKIP) |
| #define | MULT_2SPIN_DIR_PF(A, p) |
| #define | MULT_2SPIN_PF(ptr, pf) |
| #define | SAVE_RESULT(base, basep) |
| #define | LOAD_CHI(base) |
| #define | LOAD_CHIMU(base) |
| #define | XP_PROJMEM(base) |
| #define | XM_PROJMEM(base) |
| #define | YP_PROJMEM(base) |
| #define | YM_PROJMEM(base) |
| #define | ZP_PROJMEM(base) |
| #define | ZM_PROJMEM(base) |
| #define | TP_PROJMEM(base) |
| #define | TM_PROJMEM(base) |
| #define | XP_RECON |
| #define | XM_RECON |
| #define | XP_RECON_ACCUM |
| #define | XM_RECON_ACCUM |
| #define | YP_RECON_ACCUM |
| #define | YM_RECON_ACCUM |
| #define | ZP_RECON_ACCUM |
| #define | ZM_RECON_ACCUM |
| #define | TP_RECON_ACCUM |
| #define | TM_RECON_ACCUM |
| #define | ADD_RESULTi(PTR, pf) |
| #define | PERMUTE_DIR3 |
| #define | PERMUTE_DIR2 |
| #define | PERMUTE_DIR1 |
| #define | PERMUTE_DIR0 |
◆ psi_00
◆ psi_01
◆ psi_02
◆ psi_10
◆ psi_11
◆ psi_12
◆ psi_20
◆ psi_21
◆ psi_22
◆ psi_30
◆ psi_31
◆ psi_32
◆ Chi_00
◆ Chi_01
◆ Chi_02
◆ Chi_10
◆ Chi_11
◆ Chi_12
◆ UChi_00
◆ UChi_01
◆ UChi_02
◆ UChi_10
◆ UChi_11
◆ UChi_12
◆ U0
◆ U1
◆ U2
◆ one
◆ perm_reg
◆ REP
◆ IMM
◆ pREP
◆ pIMM
◆ PPC_INST_DCBTLS
◆ PPC_INST_DCBLC
◆ __PPC_CT
◆ ___PPC_RA
◆ ___PPC_RB
◆ LOCK_SET
◆ LOCK_CLEAR
◆ Chi_20
◆ Chi_21
◆ Chi_22
◆ Chi_30
◆ Chi_31
◆ Chi_32
◆ HASHit
◆ HASH
◆ LOAD64
| #define LOAD64 |
( |
| A, |
|
|
| ptr ) |
◆ MASK_REGS
◆ PF_GAUGE
◆ PREFETCH1_CHIMU
| #define PREFETCH1_CHIMU |
( |
| base | ) |
|
◆ PREFETCH_CHIMU
| #define PREFETCH_CHIMU |
( |
| base | ) |
|
◆ VLOADf
| #define VLOADf |
( |
| OFF, |
|
|
| PTR, |
|
|
| DEST ) |
◆ VLOADuf
| #define VLOADuf |
( |
| OFF, |
|
|
| PTR, |
|
|
| DEST ) |
◆ VSTOREf
| #define VSTOREf |
( |
| OFF, |
|
|
| PTR, |
|
|
| SRC ) |
◆ VSTOREuf
| #define VSTOREuf |
( |
| OFF, |
|
|
| PTR, |
|
|
| SRC ) |
◆ VSPLATf
| #define VSPLATf |
( |
| A, |
|
|
| B, |
|
|
| DEST ) |
◆ VSIZEf
◆ VPERMIi
◆ VPERMi
◆ VPERMI
◆ VPERM
◆ VLOADd
| #define VLOADd |
( |
| OFF, |
|
|
| PTR, |
|
|
| DEST ) |
◆ VLOADud
| #define VLOADud |
( |
| OFF, |
|
|
| PTR, |
|
|
| DEST ) |
◆ VSTOREd
| #define VSTOREd |
( |
| OFF, |
|
|
| PTR, |
|
|
| SRC ) |
◆ VSTOREud
| #define VSTOREud |
( |
| OFF, |
|
|
| PTR, |
|
|
| SRC ) |
◆ VSPLATd
| #define VSPLATd |
( |
| A, |
|
|
| B, |
|
|
| DEST ) |
◆ VSIZEd
◆ VZEROi
◆ VONEi
◆ VMOVi
| #define VMOVi |
( |
| DEST, |
|
|
| A ) |
◆ VADDi
| #define VADDi |
( |
| DEST, |
|
|
| A, |
|
|
| B ) |
◆ VSUBi
| #define VSUBi |
( |
| DEST, |
|
|
| A, |
|
|
| B ) |
◆ VMULi
| #define VMULi |
( |
| DEST, |
|
|
| A, |
|
|
| B ) |
◆ VMUL_RR_RIi
| #define VMUL_RR_RIi |
( |
| DEST, |
|
|
| A, |
|
|
| B ) |
◆ VMADDi
| #define VMADDi |
( |
| DEST, |
|
|
| A, |
|
|
| B, |
|
|
| C ) |
◆ VMADD_RR_RIi
| #define VMADD_RR_RIi |
( |
| DEST, |
|
|
| A, |
|
|
| B, |
|
|
| C ) |
◆ VMADD_MII_IRi
| #define VMADD_MII_IRi |
( |
| DEST, |
|
|
| A, |
|
|
| B, |
|
|
| C ) |
◆ VMADD_II_MIRi
| #define VMADD_II_MIRi |
( |
| DEST, |
|
|
| A, |
|
|
| B, |
|
|
| C ) |
◆ VZERO
◆ VONE
◆ VMOV
◆ VADD
◆ VSUB
◆ VMUL
◆ VMUL_RR_RI
| #define VMUL_RR_RI |
( |
| A, |
|
|
| B, |
|
|
| C ) |
◆ VMADD
| #define VMADD |
( |
| A, |
|
|
| B, |
|
|
| C, |
|
|
| D ) |
◆ VMADD_RR_RI
| #define VMADD_RR_RI |
( |
| A, |
|
|
| B, |
|
|
| C, |
|
|
| D ) |
◆ VMADD_MII_IR
| #define VMADD_MII_IR |
( |
| A, |
|
|
| B, |
|
|
| C, |
|
|
| D ) |
◆ VMADD_II_MIR
| #define VMADD_II_MIR |
( |
| A, |
|
|
| B, |
|
|
| C, |
|
|
| D ) |
◆ LOCK_GAUGE
| #define LOCK_GAUGE |
( |
| dir | ) |
|
◆ UNLOCK_GAUGE
| #define UNLOCK_GAUGE |
( |
| dir | ) |
|
◆ ZERO_PSI
◆ MULT_2SPIN_QPX_LSd
| #define MULT_2SPIN_QPX_LSd |
( |
| ptr, |
|
|
| p ) |
◆ MULT_2SPIN_QPX_LSf
| #define MULT_2SPIN_QPX_LSf |
( |
| ptr, |
|
|
| p ) |
◆ MULT_2SPIN_QPXd
| #define MULT_2SPIN_QPXd |
( |
| ptr, |
|
|
| p ) |
◆ MULT_2SPIN_QPXf
| #define MULT_2SPIN_QPXf |
( |
| ptr, |
|
|
| p ) |
◆ MULT_2SPIN_QPX_INTERNAL
| #define MULT_2SPIN_QPX_INTERNAL |
( |
| ptr, |
|
|
| p, |
|
|
| ULOAD, |
|
|
| USKIP ) |
◆ MULT_2SPIN_DIR_PF
| #define MULT_2SPIN_DIR_PF |
( |
| A, |
|
|
| p ) |
◆ MULT_2SPIN_PF
| #define MULT_2SPIN_PF |
( |
| ptr, |
|
|
| pf ) |
◆ SAVE_RESULT
◆ LOAD_CHI
◆ LOAD_CHIMU
| #define LOAD_CHIMU |
( |
| base | ) |
|
◆ XP_PROJMEM
| #define XP_PROJMEM |
( |
| base | ) |
|
◆ XM_PROJMEM
| #define XM_PROJMEM |
( |
| base | ) |
|
◆ YP_PROJMEM
| #define YP_PROJMEM |
( |
| base | ) |
|
◆ YM_PROJMEM
| #define YM_PROJMEM |
( |
| base | ) |
|
◆ ZP_PROJMEM
| #define ZP_PROJMEM |
( |
| base | ) |
|
◆ ZM_PROJMEM
| #define ZM_PROJMEM |
( |
| base | ) |
|
◆ TP_PROJMEM
| #define TP_PROJMEM |
( |
| base | ) |
|
◆ TM_PROJMEM
| #define TM_PROJMEM |
( |
| base | ) |
|
◆ XP_RECON
◆ XM_RECON
◆ XP_RECON_ACCUM
◆ XM_RECON_ACCUM
◆ YP_RECON_ACCUM
◆ YM_RECON_ACCUM
◆ ZP_RECON_ACCUM
◆ ZM_RECON_ACCUM
◆ TP_RECON_ACCUM
◆ TM_RECON_ACCUM
◆ ADD_RESULTi
| #define ADD_RESULTi |
( |
| PTR, |
|
|
| pf ) |
◆ PERMUTE_DIR3
◆ PERMUTE_DIR2
◆ PERMUTE_DIR1
◆ PERMUTE_DIR0